
book-05:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400680 <_init>:
  400680:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400684:	910003fd 	mov	x29, sp
  400688:	9400004c 	bl	4007b8 <call_weak_fn>
  40068c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400690:	d65f03c0 	ret

Disassembly of section .plt:

00000000004006a0 <.plt>:
  4006a0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4006a4:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf598>
  4006a8:	f947fe11 	ldr	x17, [x16, #4088]
  4006ac:	913fe210 	add	x16, x16, #0xff8
  4006b0:	d61f0220 	br	x17
  4006b4:	d503201f 	nop
  4006b8:	d503201f 	nop
  4006bc:	d503201f 	nop

00000000004006c0 <strlen@plt>:
  4006c0:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  4006c4:	f9400211 	ldr	x17, [x16]
  4006c8:	91000210 	add	x16, x16, #0x0
  4006cc:	d61f0220 	br	x17

00000000004006d0 <exit@plt>:
  4006d0:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  4006d4:	f9400611 	ldr	x17, [x16, #8]
  4006d8:	91002210 	add	x16, x16, #0x8
  4006dc:	d61f0220 	br	x17

00000000004006e0 <perror@plt>:
  4006e0:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  4006e4:	f9400a11 	ldr	x17, [x16, #16]
  4006e8:	91004210 	add	x16, x16, #0x10
  4006ec:	d61f0220 	br	x17

00000000004006f0 <fork@plt>:
  4006f0:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  4006f4:	f9400e11 	ldr	x17, [x16, #24]
  4006f8:	91006210 	add	x16, x16, #0x18
  4006fc:	d61f0220 	br	x17

0000000000400700 <__libc_start_main@plt>:
  400700:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400704:	f9401211 	ldr	x17, [x16, #32]
  400708:	91008210 	add	x16, x16, #0x20
  40070c:	d61f0220 	br	x17

0000000000400710 <__gmon_start__@plt>:
  400710:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400714:	f9401611 	ldr	x17, [x16, #40]
  400718:	9100a210 	add	x16, x16, #0x28
  40071c:	d61f0220 	br	x17

0000000000400720 <abort@plt>:
  400720:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400724:	f9401a11 	ldr	x17, [x16, #48]
  400728:	9100c210 	add	x16, x16, #0x30
  40072c:	d61f0220 	br	x17

0000000000400730 <printf@plt>:
  400730:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400734:	f9401e11 	ldr	x17, [x16, #56]
  400738:	9100e210 	add	x16, x16, #0x38
  40073c:	d61f0220 	br	x17

0000000000400740 <execlp@plt>:
  400740:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400744:	f9402211 	ldr	x17, [x16, #64]
  400748:	91010210 	add	x16, x16, #0x40
  40074c:	d61f0220 	br	x17

0000000000400750 <waitpid@plt>:
  400750:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400754:	f9402611 	ldr	x17, [x16, #72]
  400758:	91012210 	add	x16, x16, #0x48
  40075c:	d61f0220 	br	x17

0000000000400760 <fgets@plt>:
  400760:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400764:	f9402a11 	ldr	x17, [x16, #80]
  400768:	91014210 	add	x16, x16, #0x50
  40076c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400770 <_start>:
  400770:	d280001d 	mov	x29, #0x0                   	// #0
  400774:	d280001e 	mov	x30, #0x0                   	// #0
  400778:	aa0003e5 	mov	x5, x0
  40077c:	f94003e1 	ldr	x1, [sp]
  400780:	910023e2 	add	x2, sp, #0x8
  400784:	910003e6 	mov	x6, sp
  400788:	580000c0 	ldr	x0, 4007a0 <_start+0x30>
  40078c:	580000e3 	ldr	x3, 4007a8 <_start+0x38>
  400790:	58000104 	ldr	x4, 4007b0 <_start+0x40>
  400794:	97ffffdb 	bl	400700 <__libc_start_main@plt>
  400798:	97ffffe2 	bl	400720 <abort@plt>
  40079c:	00000000 	.inst	0x00000000 ; undefined
  4007a0:	0040086c 	.word	0x0040086c
  4007a4:	00000000 	.word	0x00000000
  4007a8:	00400978 	.word	0x00400978
  4007ac:	00000000 	.word	0x00000000
  4007b0:	004009f8 	.word	0x004009f8
  4007b4:	00000000 	.word	0x00000000

00000000004007b8 <call_weak_fn>:
  4007b8:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf598>
  4007bc:	f947f000 	ldr	x0, [x0, #4064]
  4007c0:	b4000040 	cbz	x0, 4007c8 <call_weak_fn+0x10>
  4007c4:	17ffffd3 	b	400710 <__gmon_start__@plt>
  4007c8:	d65f03c0 	ret
  4007cc:	00000000 	.inst	0x00000000 ; undefined

00000000004007d0 <deregister_tm_clones>:
  4007d0:	b0000080 	adrp	x0, 411000 <strlen@GLIBC_2.17>
  4007d4:	9101a000 	add	x0, x0, #0x68
  4007d8:	b0000081 	adrp	x1, 411000 <strlen@GLIBC_2.17>
  4007dc:	9101a021 	add	x1, x1, #0x68
  4007e0:	eb00003f 	cmp	x1, x0
  4007e4:	540000a0 	b.eq	4007f8 <deregister_tm_clones+0x28>  // b.none
  4007e8:	90000001 	adrp	x1, 400000 <_init-0x680>
  4007ec:	f9450c21 	ldr	x1, [x1, #2584]
  4007f0:	b4000041 	cbz	x1, 4007f8 <deregister_tm_clones+0x28>
  4007f4:	d61f0020 	br	x1
  4007f8:	d65f03c0 	ret
  4007fc:	d503201f 	nop

0000000000400800 <register_tm_clones>:
  400800:	b0000080 	adrp	x0, 411000 <strlen@GLIBC_2.17>
  400804:	9101a000 	add	x0, x0, #0x68
  400808:	b0000081 	adrp	x1, 411000 <strlen@GLIBC_2.17>
  40080c:	9101a021 	add	x1, x1, #0x68
  400810:	cb000021 	sub	x1, x1, x0
  400814:	9343fc21 	asr	x1, x1, #3
  400818:	8b41fc21 	add	x1, x1, x1, lsr #63
  40081c:	9341fc21 	asr	x1, x1, #1
  400820:	b40000a1 	cbz	x1, 400834 <register_tm_clones+0x34>
  400824:	90000002 	adrp	x2, 400000 <_init-0x680>
  400828:	f9451042 	ldr	x2, [x2, #2592]
  40082c:	b4000042 	cbz	x2, 400834 <register_tm_clones+0x34>
  400830:	d61f0040 	br	x2
  400834:	d65f03c0 	ret

0000000000400838 <__do_global_dtors_aux>:
  400838:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40083c:	910003fd 	mov	x29, sp
  400840:	f9000bf3 	str	x19, [sp, #16]
  400844:	b0000093 	adrp	x19, 411000 <strlen@GLIBC_2.17>
  400848:	3941c260 	ldrb	w0, [x19, #112]
  40084c:	35000080 	cbnz	w0, 40085c <__do_global_dtors_aux+0x24>
  400850:	97ffffe0 	bl	4007d0 <deregister_tm_clones>
  400854:	52800020 	mov	w0, #0x1                   	// #1
  400858:	3901c260 	strb	w0, [x19, #112]
  40085c:	f9400bf3 	ldr	x19, [sp, #16]
  400860:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400864:	d65f03c0 	ret

0000000000400868 <frame_dummy>:
  400868:	17ffffe6 	b	400800 <register_tm_clones>

000000000040086c <main>:
  40086c:	d11083ff 	sub	sp, sp, #0x420
  400870:	a9007bfd 	stp	x29, x30, [sp]
  400874:	910003fd 	mov	x29, sp
  400878:	90000000 	adrp	x0, 400000 <_init-0x680>
  40087c:	9128a000 	add	x0, x0, #0xa28
  400880:	97ffffac 	bl	400730 <printf@plt>
  400884:	14000032 	b	40094c <main+0xe0>
  400888:	910063a0 	add	x0, x29, #0x18
  40088c:	97ffff8d 	bl	4006c0 <strlen@plt>
  400890:	d1000400 	sub	x0, x0, #0x1
  400894:	910063a1 	add	x1, x29, #0x18
  400898:	38606820 	ldrb	w0, [x1, x0]
  40089c:	7100281f 	cmp	w0, #0xa
  4008a0:	540000c1 	b.ne	4008b8 <main+0x4c>  // b.any
  4008a4:	910063a0 	add	x0, x29, #0x18
  4008a8:	97ffff86 	bl	4006c0 <strlen@plt>
  4008ac:	d1000400 	sub	x0, x0, #0x1
  4008b0:	910063a1 	add	x1, x29, #0x18
  4008b4:	3820683f 	strb	wzr, [x1, x0]
  4008b8:	97ffff8e 	bl	4006f0 <fork@plt>
  4008bc:	b9041fa0 	str	w0, [x29, #1052]
  4008c0:	b9441fa0 	ldr	w0, [x29, #1052]
  4008c4:	7100001f 	cmp	w0, #0x0
  4008c8:	540000aa 	b.ge	4008dc <main+0x70>  // b.tcont
  4008cc:	90000000 	adrp	x0, 400000 <_init-0x680>
  4008d0:	9128c000 	add	x0, x0, #0xa30
  4008d4:	97ffff83 	bl	4006e0 <perror@plt>
  4008d8:	1400000e 	b	400910 <main+0xa4>
  4008dc:	b9441fa0 	ldr	w0, [x29, #1052]
  4008e0:	7100001f 	cmp	w0, #0x0
  4008e4:	54000161 	b.ne	400910 <main+0xa4>  // b.any
  4008e8:	910063a1 	add	x1, x29, #0x18
  4008ec:	910063a0 	add	x0, x29, #0x18
  4008f0:	d2800002 	mov	x2, #0x0                   	// #0
  4008f4:	97ffff93 	bl	400740 <execlp@plt>
  4008f8:	910063a1 	add	x1, x29, #0x18
  4008fc:	90000000 	adrp	x0, 400000 <_init-0x680>
  400900:	91290000 	add	x0, x0, #0xa40
  400904:	97ffff8b 	bl	400730 <printf@plt>
  400908:	52800fe0 	mov	w0, #0x7f                  	// #127
  40090c:	97ffff71 	bl	4006d0 <exit@plt>
  400910:	910053a0 	add	x0, x29, #0x14
  400914:	52800002 	mov	w2, #0x0                   	// #0
  400918:	aa0003e1 	mov	x1, x0
  40091c:	b9441fa0 	ldr	w0, [x29, #1052]
  400920:	97ffff8c 	bl	400750 <waitpid@plt>
  400924:	b9041fa0 	str	w0, [x29, #1052]
  400928:	b9441fa0 	ldr	w0, [x29, #1052]
  40092c:	7100001f 	cmp	w0, #0x0
  400930:	5400008a 	b.ge	400940 <main+0xd4>  // b.tcont
  400934:	90000000 	adrp	x0, 400000 <_init-0x680>
  400938:	91296000 	add	x0, x0, #0xa58
  40093c:	97ffff69 	bl	4006e0 <perror@plt>
  400940:	90000000 	adrp	x0, 400000 <_init-0x680>
  400944:	9128a000 	add	x0, x0, #0xa28
  400948:	97ffff7a 	bl	400730 <printf@plt>
  40094c:	b0000080 	adrp	x0, 411000 <strlen@GLIBC_2.17>
  400950:	9101a000 	add	x0, x0, #0x68
  400954:	f9400001 	ldr	x1, [x0]
  400958:	910063a0 	add	x0, x29, #0x18
  40095c:	aa0103e2 	mov	x2, x1
  400960:	52808001 	mov	w1, #0x400                 	// #1024
  400964:	97ffff7f 	bl	400760 <fgets@plt>
  400968:	f100001f 	cmp	x0, #0x0
  40096c:	54fff8e1 	b.ne	400888 <main+0x1c>  // b.any
  400970:	52800000 	mov	w0, #0x0                   	// #0
  400974:	97ffff57 	bl	4006d0 <exit@plt>

0000000000400978 <__libc_csu_init>:
  400978:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  40097c:	910003fd 	mov	x29, sp
  400980:	a901d7f4 	stp	x20, x21, [sp, #24]
  400984:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf598>
  400988:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf598>
  40098c:	91374294 	add	x20, x20, #0xdd0
  400990:	913722b5 	add	x21, x21, #0xdc8
  400994:	a902dff6 	stp	x22, x23, [sp, #40]
  400998:	cb150294 	sub	x20, x20, x21
  40099c:	f9001ff8 	str	x24, [sp, #56]
  4009a0:	2a0003f6 	mov	w22, w0
  4009a4:	aa0103f7 	mov	x23, x1
  4009a8:	9343fe94 	asr	x20, x20, #3
  4009ac:	aa0203f8 	mov	x24, x2
  4009b0:	97ffff34 	bl	400680 <_init>
  4009b4:	b4000194 	cbz	x20, 4009e4 <__libc_csu_init+0x6c>
  4009b8:	f9000bb3 	str	x19, [x29, #16]
  4009bc:	d2800013 	mov	x19, #0x0                   	// #0
  4009c0:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  4009c4:	aa1803e2 	mov	x2, x24
  4009c8:	aa1703e1 	mov	x1, x23
  4009cc:	2a1603e0 	mov	w0, w22
  4009d0:	91000673 	add	x19, x19, #0x1
  4009d4:	d63f0060 	blr	x3
  4009d8:	eb13029f 	cmp	x20, x19
  4009dc:	54ffff21 	b.ne	4009c0 <__libc_csu_init+0x48>  // b.any
  4009e0:	f9400bb3 	ldr	x19, [x29, #16]
  4009e4:	a941d7f4 	ldp	x20, x21, [sp, #24]
  4009e8:	a942dff6 	ldp	x22, x23, [sp, #40]
  4009ec:	f9401ff8 	ldr	x24, [sp, #56]
  4009f0:	a8c47bfd 	ldp	x29, x30, [sp], #64
  4009f4:	d65f03c0 	ret

00000000004009f8 <__libc_csu_fini>:
  4009f8:	d65f03c0 	ret

Disassembly of section .fini:

00000000004009fc <_fini>:
  4009fc:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400a00:	910003fd 	mov	x29, sp
  400a04:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400a08:	d65f03c0 	ret
